| PART |
Description |
Maker |
| MC10EP29MNTXG |
3.3V / 5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 10E SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, QCC20
|
ON Semiconductor
|
| MC10E131 MC10E131FN MC100E131FN ON0617 MC100E131 |
4-BIT D FLIP-FLOP 100E SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC28
From old datasheet system
|
Motorola Mobility Holdings, Inc.
Motorola, Inc
MOTOROLA[Motorola Inc]
ONSEMI[ON Semiconductor]
|
| 74AUP2G79GF 74AUP2G79GS |
Low-power dual D-type flip-flop; positive-edge trigger AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
| 74AUP2G80GT 74AUP2G80GM 74AUP2G80DC 74AUP2G80 74AU |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
|
| MC74HC109 ON1335 |
Dual J-K Flip-Flop with Set and Rest
From old datasheet system
DUAL J-K FLIP-FLOP WITH SET AND RESET
|
Motorola, Inc
ON Semi
|
| 57401AJ/883B C57401AJ/883B 57401J 57401L 57402J 57 |
DUAL 'D' - TYPE FLIP-FLOP
x5 Asynchronous FIFO
7 STAGE RIPPLE-CARRY BINARY COUNTER/DIVIDERS
QUAD BILATERAL SWITCH
DUAL-J-K MASTER-SLAVE FLIP-FLOP X5的异步FIFO
x4 Asynchronous FIFO x4异步FIFO
|
Atmel, Corp.
NIC Components, Corp.
|
| 74LCX112SJ 74LCX112 74LCX112M 74LCX112MTC 74LCX112 |
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs LVC/LCX/Z SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
Fairchild Semiconductor, Corp.
http://
FAIRCHILD[Fairchild Semiconductor]
|
| 74HC74DR2 74HC74DG |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
ON Semiconductor
|
| DM74AS74 DM74AS74SJX DM74AS74M DM74AS74N DM74AS74S |
Dual D-Type Positive-Edge-Triggered Flip-Flop with Preset and Clear AS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
Dual D Positive-Edge-Triggered Flip-Flop with Preset and Clear
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| 74ALS109AN 74ALS109A 74ALS109AD |
Dual J-K positive edge-triggered flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
|
Rochester Electronics, LLC
PHILIPS[Philips Semiconductors]
NXP Semiconductors
|
| T74LS113AD1 T74LS113AC1 T74LS113AM1 T74LS113AB1 |
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14 CERAMIC, DIP-14
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC20 PLASTIC, LCC-20
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 MICRO, SO-14
LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14 PLASTIC, DIP-14
|
ST Microelectronics
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
